STM32L4System

Const

fMSI* = 4000000;

fHSI* = 16000000;

fHSE* = 24000000;

HSI* = 0;

HSE* = 1;

Vars

HCLK*,
    PCLK1*,
    PCLK2*,
    PCLK*,
    QCLK*, (* QCLK <= 48 MHz, best is 48 MHz *)
    RCLK* : INTEGER;

Procedures

SetPLLSysClock

Configures the System clock source,

PLL Multiplier and Divider factors, AHB/APBx prescalers and Flash settings

PLLSRC: HSI | HSE NOTE:

should be called only once the RCC clock configuration is reset to the default reset state (done in Init)

PROCEDURE SetPLLSysClock*(PLLSRC: INTEGER);

Init

PROCEDURE Init*;